Education

Biography

Dr. Chandrasekaran is currently an Assistant Professor at the University of Delaware (UD) with the Department of Computer & Information Sciences. Prior to UD, Dr. Chandrasekaran was working as a Post Doctoral Researcher at the University of Houston with Dr. Barbara Chapman at the Department of Computer Science. She received a PhD in Computer Science Engineering from Nanyang Technological University (NTU), Singapore, for developing a high-level portable software tool chain for complex embedded reconfigurable hardware. She received a B.Engg in Electrical and Electronics (EEE) from India.

Research Interest

Building validation & verification suite to validate the implementations of high-level directive-based programming models such as OpenACC,   Exploring  programming   strategies  and  constructing   tool  chains  for  embedded multicore  devices using Multicore Association  (MCA)  standards and so on.

Professional Activities:

• CURRENT APPOINTMENT:
  Assistant Professor, University of Delaware, Newark, Delaware, USA September 2015
• PAST APPOINTMENT:
  Postdoctoral Researcher, University of Houston, TX, USA Nov 2010- August 2015
  (Advisor: Prof. Barbara Chapman)

WORK EXPERIENCE

Publications

• Cheng Wang, Sunita Chandrasekaran, Barbara Chapman, “cus FFT: A High-Performance Sparse Fast Fourier Transform Algorithm on GPUs”, 30th IEEE International Parallel & Distributed Processing
• Peng Sun, Sunita Chandrasekaran, and Barbara Chapman, “Deploying Open MP Task Parallelism on Multicore Embedded Systems with MCA Task APIs”, In Proceedings of IEEE HPCC 2015, pp 843-847, 2015
• Peng Sun, Sunita Chandrasekaran, and Barbara Chapman. “Open MPMCA: Leveraging Multiprocessor Embedded Systems using industry standards”, In Proceedings of the 2015 IEEE International Parallel & Distributed Processing Symposium Workshops, PLC2015, 10.1109/IPDPSW.2015.13, pp. 679-688, IEEE
• Rengan Xu, Maxime Hugues, Henri Calandra, Sunita Chandrasekaran and Barbara Chapman. "Accelerating Kirchhoff Migration on GPU using Directives", In Proceedings of ACM SIGHPC, The first Workshop on Accelerator Programming using Directives (WACCPD 2014) co-located with SC14, IEEE Press, pp. 37-46, 2014
• Guido Juckeland, William Brantley, Sunita Chandrasekaran, et al., “SPEC ACCEL – A Standard Application Suite for Measuring Hardware Accelerator Performance”, In International  Workshop on Performance Modeling, Benchmarking and Simulation of High Performance Computer Systems (PMBS14) co-located with SC14, Springer Verlag, pp 46-67, 2014
• Peng Sun, Sunita Chandrasekaran, and Barbara Chapman. “Targeting Heterogeneous SoCs using MCAPI”. In TECHCON 2014, in the GRC Research Category Section 29.1, SRC, 2014
• Rengan Xu, Cheng Wang, Sunita Chandrasekaran, Barbara Chapman, “An Open ACC1.0 Validation Suite” In Proceedings of the 2014 IEEE International Parallel & Distributed Processing Symposium Workshops (IPDPSW), MTAAP 2014, pp 1407-1416, 2014
• Rengan Xu, Xiaonan Tian, Yonghong Yan, Sunita Chandrasekaran, Barbara M. Chapman, “Reduction Operations in Parallel Loops for GPGPUs”, In Proceedings of ACM, Programming Models and Applications on Multicores and Manycores (PMAM), pp 10:10--10:20, 2014
• Rengan Xu, Xiaonan Tian, Sunita Chandrasekaran, Yonghong Yan and Barbara Chapman. "NAS Parallel Benchmarks on GPGPUs using a Directive-based Programming Model". In Proceedings of Springer Verlag, The 27th International Workshop on Languages and Compilers  for Parallel Computing (LCPC), pp. 67-81, 2014
• Cheng Wang, Mauricio Araya, Sunita Chandrasekaran, Barbara Chapman, Detlef Hohl, “Parallel Sparse FFT”, In Proceedings of ACM, The 3rd Workshop on Irregular Applications: Architectures and Algorithms (IA^3), co-located with SC 2013, pp 10:1--10:8, 2013
• Xiaonan Tian, Rengan Xu, Yonghong Yan, Zhifeng Yun, Sunita Chandrasekaran, and Barbara Chapman. "Compiling A High-Level Directive-based Programming Model for Accelerators". In Proceedings of Springer Verlag, 26th International Workshop on Languages and Compilers for High Performance Computing (LCPC 2013), pp. 105-120, 2013
• Sayan Ghosh, Sunita Chandrasekaran, Barbara Chapman, “Statistical Modeling of Power/Energy of Scientific Kernels on a Multi-GPU system”, In Proceedings of IEEE, Third International Workshop on Power Measurement and Profiling (PMP) co-located with IGCC, 1-6, 2013
• Cheng Wang, Sunita Chandrasekaran, Barbara Chapman, Jim Holt, “Portable Mapping of Open MP to Multicore Embedded Systems Using MCA APIs”, In Proceedings of the 14th ACM SIGPLAN/SIGBED conference on Languages, compilers and tools for embedded systems,153—162, 2013
• Rengan Xu, Sunita Chandrasekaran, Barbara Chapman, “Exploring Programming Multi-GPUs using OpenMP & OpenACC-based Hybrid Model”, In Proceedings of 2012 IEEE Workshop on Multicore and GPU Programming Models, Languages and Compiler (PLC) collocated IPDPS, pp 1169 –1176, 2013
• Cheng Wang, Sunita Chandrasekaran, Barbara Chapman, Jim Holt, “libEOMP: a portable Open MP runtime library based on MCA APIs for embedded systems”, In Proceedings of ACM, International Workshop on Programming Models and Applications for Multicores and Manycore co- located with PPoPP., pp 83-92, 2013
• Rengan Xu, Sunita Chandrasekaran, Barbara Chapman, Christoph F. Eick, “Directive-based Programming Models for Scientific Applications - A Comparison”, In Proceedings of IEEE, Second International Workshop on Domain-Specific Languages and High-Level Frameworks for High Performance Computing (Wolfhpc) co-located with Supercomputing(SC), pp 1 – 9, 2012
• Lei Huang, Eric Stotzer, Hangjun Yi, Barbara Chapman, Sunita Chandrasekaran, “Parallelizing Ultrasound Image Processing using Open MP on Multi core Embedded Systems”, In Proceedings of 2012 IEEE Global High Tech Congress on Electronics (GHTCE), 131-138, DOI: 10.1109/GHTCE.2012.6490139, 2012.
• Cheng Wang, Sunita Chandrasekaran, Barbara Chapman, “An OpenMP3.1 Validation testsuite”, In Proceedings of IWOMP 2012, LNCS, Volume 7312/2012,p.237-249, Rome, Italy, June 2012
• Sayan Ghosh, Sunita Chandrasekaran, Barbara Chapman, “Energy Analysis of Parallel Scientific Kernels on Multiple GPUs”, In Proceedings of IEEE, SAAHPC, ISSN: 2166-5133, p.54-63, Chicago, July 2012
• Ayodunni Aribuki, Sunita Chandrasekaran, and Barbara Chapman, “Extending Open MP for Heterogeneous Multicore Systems”, TECHCON, 2011, Semiconductor Research Corporation (SRC) Project, Austin, USA, September 2011
• Ayodunni Aribuki, Sunita Chandrasekaran, Jae-Chang Hong, and Barbara Chapman, “Improving Heterogeneous Multicore Programming using Open MP”, In Proceedings of Multicore Expo 2011, CA, USA
• Eric Stahlberg, Thomas Steinke, Melissa Smith, Sunita Chandrasekaran, Barbara Chapman, “Heterogeneous Accelerated Bioinformatics – Perspectives for Cancer Research” In Proceedings ofInternational Conference on Engineering of Reconfigurable Systems and Algorithms, ERSA, USA,2011
• Sunita Chandrasekaran, HuiYan Cheah, Douglas. L. Maskell, “Automatic Scheduling and Mapping Techniques for mapping HLL applications on FPGA”, Many-Core and Reconfigurable Supercomputing Conference, MRSC 2011, Bristol, UK, April 2011.
• Sunita Chandrasekaran, Shilpa Shanbagh, Douglas. L. Maskell, "A Dependency Graph based Methodology for Parallelizing HLL Applications on FPGA", In Proceedings of the 18th ACM/SIGDA International Symposium on Field-Programmable Gate Arrays Proceedings,(abstract only), FPGA 2010, Monterey, California, USA, February 2010.
• Sunita Chandrasekaran, Avanthi B. Reddy, Shilpa Shanbagh, Douglas. L. Maskell, "HLL mapping to FPGA using a dependency analysis based graphical methodology", Many-Core and Reconfigurable Supercomputing Conference - MRSC 2010, Rome, Italy, March 2010.
• Kevin A. Huck, Oscar Hernandez, Van Bui, Sunita Chandrasekaran, Barbara Chapman, Allen D. Malony, Lois Curfman McInnes, Boyana Norris, "Capturing Performance Knowledge for Automated Analysis", IEEE/ACM International Conference for High Performance Computing, Networking, Storage and Analysis -SC08, Austin, Texas, November 2008.
• Sunita Chandrasekaran, Oscar Hernandez, Douglas Maskell, Barbara Chapman, Van Bui, “Compilation and Parallelization Techniques with Tool Support to realize Sequence Alignment Algorithm on FPGA and Multicore”, Workshop on New Horizons in Compilers, IEEE Int. Conf. on High Performance Computing (HiPC), Goa, India,